Graphics
Catlab.Graphics.ComposeWiringDiagrams
— ModuleDraw wiring diagrams using Compose.jl.
Catlab.Graphics.ComposeWiringDiagrams.ComposePicture
— TypeA Compose context together with a given width and height.
We need this type because contexts have no notion of size or aspect ratio, but wiring diagram layouts have fixed aspect ratios.
Catlab.Graphics.ComposeWiringDiagrams.layout_to_composejl
— MethodDraw a wiring diagram in Compose.jl using the given layout.
Catlab.Graphics.ComposeWiringDiagrams.to_composejl
— MethodDraw a wiring diagram in Compose.jl.
Catlab.Graphics.GraphvizWiringDiagrams
— ModuleLay out and draw wiring diagrams using Graphviz.
Catlab.Graphics.Graphviz.to_graphviz
— MethodDraw an undirected wiring diagram using Graphviz.
Creates an undirected, bipartite Graphviz graph, with the boxes and outer ports of the diagram becoming nodes of one kind and the junctions of the diagram becoming nodes of the second kind.
Arguments
graph_name="G"
: name of Graphviz graphprog="neato"
: Graphviz program, usually "neato" or "fdp"box_labels=nothing
: name of diagram data for box labelport_labels=true
: label ports with their numberjunction_labels=nothing
: name of diagram data for junction labeljunction_size="0.075"
: size of junction nodes, in inchesimplicit_junctions=false
: whether to represent a junction implicity as a wire when it has exactly two incident portsgraph_attrs=Dict()
: top-level graph attributesnode_attrs=Dict()
: top-level node attributesedge_attrs=Dict()
: top-level edge attributes
Catlab.Graphics.Graphviz.to_graphviz
— MethodDraw a wiring diagram using Graphviz.
The input f
can also be a morphism expression, which is converted into a wiring diagram.
Arguments
graph_name="G"
: name of Graphviz digraphorientation=TopToBottom
: orientation of layout. One ofLeftToRight
,RightToLeft
,TopToBottom
, orBottomToTop
.node_labels=true
: whether to label the nodeslabels=false
: whether to label the edgeslabel_attr=:label
: what kind of edge label to use (iflabels
is true). One of:label
,:xlabel
,:headlabel
, or:taillabel
.port_size="24"
: minimum size of ports on box, in pointsjunction_size="0.05"
: size of junction nodes, in inchesouter_ports=true
: whether to display the outer box's input and output ports. If disabled, no incoming or outgoing wires will be shown either!anchor_outer_ports=true
: whether to enforce ordering of the outer box's input and output, i.e., ordering of the incoming and outgoing wiresgraph_attrs=Dict()
: top-level graph attributesnode_attrs=Dict()
: top-level node attributesedge_attrs=Dict()
: top-level edge attributescell_attrs=Dict()
: main cell attributes in node HTML-like label
Catlab.Graphics.GraphvizWiringDiagrams.graphviz_layout
— MethodLay out directed wiring diagram using Graphviz.
Note: At this time, only the positions and sizes of the boxes, and the positions of the outer ports, are used. The positions of the box ports and the splines for the wires are ignored.
Catlab.Graphics.TikZWiringDiagrams
— ModuleDraw wiring diagrams using TikZ.
Catlab.Graphics.TikZWiringDiagrams.layout_to_tikz
— MethodDraw a wiring diagram in TikZ using the given layout.
Catlab.Graphics.TikZWiringDiagrams.to_tikz
— MethodDraw a wiring diagram in TikZ.
Catlab.Graphics.WiringDiagramLayouts
— ModuleBackend-agnostic layout of wiring diagrams via morphism expressions.
This module lays out wiring diagrams for visualization, independent of any specific graphics system. It uses the structure of a morphism expression to determine the layout. Thus, the first step of the algorithm is to convert the wiring diagram to a symbolic expression, using the submodule WiringDiagrams.Expressions
. Morphism expressions may also be given directly.
Catlab.Graphics.WiringDiagramLayouts.LayoutOrientation
— TypeOrientation of wiring diagram.
Catlab.Graphics.WiringDiagramLayouts.layout_box
— MethodLay out a box and its ports.
By default the box is rectangular, but other shapes are also supported.
Catlab.Graphics.WiringDiagramLayouts.layout_diagram
— MethodLay out a wiring diagram or morphism expression for visualization.
If a wiring diagram is given, it is first to converted to a morphism expression.
The layout is calculated with respect to a cartesian coordinate system with origin at the center of the diagram and the positive y-axis pointing downwards. Box positions are relative to their centers. All positions and sizes are dimensionless (unitless).
Catlab.Graphics.YFilesWiringDiagrams
— ModuleDeserialize abstract wiring diagram from yFiles.
Reads a wiring diagram from the GraphML dialect used by yEd and yFiles. Unlike the GraphML spec, the yEd data model does not explicitly include ports:
- https://yed.yworks.com/support/qa/102/
- https://yed.yworks.com/support/qa/2531/
We infer the ports of boxes and their order from the geometry of the diagram. Thus, this module has the nature of a hack. While it may be useful for interactive and exploratory work, it should not be used in a production system.
Catlab.Graphics.YFilesWiringDiagrams.parse_yfiles_diagram
— MethodParse a wiring diagram from a GraphML string or XML doc created by yFiles.
Catlab.Graphics.YFilesWiringDiagrams.read_yfiles_diagram
— MethodRead a wiring diagram from a GraphML file created by yEd and yFiles.